Abstract: Direct Digital Frequency Synthesis (DDS) technology offers several advantages, including high frequency resolution, rapid conversion speed, and phase continuity. Consequently, it is a widely utilized technology in a number of fields, including wireless communication, satellite navigation, and electronic reconnaissance. The article employs DDS technology and development tools, specifically ModelSim SE and Quartus Ⅱ 13.0, in conjunction with the hardware description language Verilog HDL, to complete the design, simulation, and online logic debugging and analysis of the signal generator. The system is capable of achieving the following: (1) Generation of sine, triangle, and square waves; (2) Adjustment of frequency, amplitude, and duty cycle via key input; (3) Visualization of output signal via oscilloscope. The output frequency range is 1 Hz to 1 MHz, the output peak-to-peak amplitude is continuously adjustable in the range of 0 to 6.4 V, and the duty cycle is continuously adjustable from 0 to 100%, as verified by simulation and measurement. The implementation of the system provides an illustrative example for students to learn FPGA courses.